Concurrency control

Results: 1488



#Item
971Tech. Rep. 429, Computer Science Dept., Univ. of Rochester.  Fast, Contention-Free Combining Tree Barriers Michael L. Scott Computer Science Department

Tech. Rep. 429, Computer Science Dept., Univ. of Rochester. Fast, Contention-Free Combining Tree Barriers Michael L. Scott Computer Science Department

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Source URL: www.cs.rochester.edu

Language: English - Date: 2011-03-27 18:33:42
972Brief Announcement: Transactions and Privatization in Delaunay Triangulation ∗  Michael L. Scott, Michael F. Spear, Luke Dalessandro, and Virendra J. Marathe

Brief Announcement: Transactions and Privatization in Delaunay Triangulation ∗ Michael L. Scott, Michael F. Spear, Luke Dalessandro, and Virendra J. Marathe

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Source URL: www.cs.rochester.edu

Language: English - Date: 2007-06-08 00:06:56
973Static Deadlock Detection for Java Libraries Amy Williams, William Thies, and Michael D. Ernst Computer Science and Artificial Intelligence Laboratory Massachusetts Institute of Technology Cambridge, MA[removed]USA {amy,th

Static Deadlock Detection for Java Libraries Amy Williams, William Thies, and Michael D. Ernst Computer Science and Artificial Intelligence Laboratory Massachusetts Institute of Technology Cambridge, MA[removed]USA {amy,th

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Source URL: people.csail.mit.edu

Language: English - Date: 2005-05-12 23:00:24
974Simple, Fast, and Practical Non-Blocking and Blocking Concurrent Queue Algorithms Maged M. Michael Michael L. Scott

Simple, Fast, and Practical Non-Blocking and Blocking Concurrent Queue Algorithms Maged M. Michael Michael L. Scott

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Source URL: www.cs.rochester.edu

Language: English - Date: 2008-01-30 21:42:09
975Transactions as the Foundation of a Memory Consistency Model∗ Luke Dalessandro Michael L. Scott  Michael F. Spear

Transactions as the Foundation of a Memory Consistency Model∗ Luke Dalessandro Michael L. Scott Michael F. Spear

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Source URL: www.cs.rochester.edu

Language: English - Date: 2010-07-12 16:08:45
976Static Deadlock Detection for Java Libraries Amy Williams, William Thies, and Michael D. Ernst Computer Science and Artificial Intelligence Laboratory Massachusetts Institute of Technology Cambridge, MA[removed]USA {amy,th

Static Deadlock Detection for Java Libraries Amy Williams, William Thies, and Michael D. Ernst Computer Science and Artificial Intelligence Laboratory Massachusetts Institute of Technology Cambridge, MA[removed]USA {amy,th

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Source URL: people.csail.mit.edu

Language: English - Date: 2005-05-31 13:35:36
977Static Deadlock Detection for Java Libraries Amy Williams, William Thies, and Michael D. Ernst Computer Science and Artificial Intelligence Laboratory Massachusetts Institute of Technology Cambridge, MA[removed]USA {amy,th

Static Deadlock Detection for Java Libraries Amy Williams, William Thies, and Michael D. Ernst Computer Science and Artificial Intelligence Laboratory Massachusetts Institute of Technology Cambridge, MA[removed]USA {amy,th

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Source URL: groups.csail.mit.edu

Language: English - Date: 2005-05-12 23:00:24
9787th Wkshp. on Languages, Compilers, and Run-Time Support for Scalable Systems (LCR), Houston, TX, Oct[removed]Design Tradeoffs in Modern Software Transactional Memory Systems? Virendra J. Marathe, William N. Scherer III, a

7th Wkshp. on Languages, Compilers, and Run-Time Support for Scalable Systems (LCR), Houston, TX, Oct[removed]Design Tradeoffs in Modern Software Transactional Memory Systems? Virendra J. Marathe, William N. Scherer III, a

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Source URL: www.cs.rochester.edu

Language: English - Date: 2011-04-01 00:57:58
979A Qualitative Survey of Modern Software Transactional Memory Systems∗ Virendra J. Marathe and Michael L. Scott TR 839 Department of Computer Science University of Rochester

A Qualitative Survey of Modern Software Transactional Memory Systems∗ Virendra J. Marathe and Michael L. Scott TR 839 Department of Computer Science University of Rochester

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Source URL: www.cs.rochester.edu

Language: English - Date: 2006-02-15 12:33:25
980A Key-based Adaptive Transactional Memory Executor∗ Tongxin Bai Xipeng Shen‡ Chengliang Zhang William N. Scherer III † Chen Ding

A Key-based Adaptive Transactional Memory Executor∗ Tongxin Bai Xipeng Shen‡ Chengliang Zhang William N. Scherer III † Chen Ding

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Source URL: www.cs.rochester.edu

Language: English - Date: 2006-12-19 16:02:17